Make Knowledge

Contents

• Overview
• Core Idea
• Make Terminology

Overview

make is build automation software which specializes in compiling C/C++ projects but can be used generally in any scenario where your desired outputs are files.

A makefile—typically with the name Makefile—stores rules which contain information on when and how to create these outputs.

A rule is comprised of:

• the target - the name of the output file to be created and the argument passed to make
• any prerequisites - the inputs—other targets—the output depends on
• a recipe - the commands to run to create the output

This information is then used when make is invoked with a target name.

Using prerequisites allows the creation of a dependency graph for the desired output. make makes the assumption that if an output’s inputs are newer than the output, it should be rebuilt. The proxy used for this “newer” assumption is the file’s modified time. The contents of the file are not compared between invocations.

Core Idea

The big idea here is that make allows the creation of a dependency graph of deterministic build steps—targets—of which only a subset may need to be rebuilt. This efficiency allows make to rebuild projects very quickly.

You can think of a makefile as a recipe book and make as a hyper-efficient cook obsessed with freshness who refuses to remake a component ingredient unless its own ingredients are fresher.

So, in essence:

• centralize your hand-written build invocations into a single place: the makefile
• organize the build into separate steps that taken inputs—files—and create outputs—also files—that are named as targets
• define the dependency relationship between targets, creating a dependency graph
• use the modification fimes of the file corresponding to a target, and its inputs, to determine whether it needs to be rerun
• store the commands necessary to create the output file as a recipe associated with the target

You now have all the outputs of your project captured in a single place that is easily viewed, modified, and able to be efficiently invoked.

Make Terminology

makefile

a file that contains rules which tell make what to do

phony target

a target that does not generate a file of the same name

prerequisite

a file that is used as input to create the target

recipe

the action—commands—that make carries out for a rule

rule

the collection of information used to determine when and how to remake certain files

target

the name of a file generated by the rule, except in special cases like phony targets